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Page 10 Epson Research and Development
Vancouver Design Center
S1D13705 Interfacing to the PC Card Bus
X27A-G-009-02 Issue Date: 01/02/13
3 S1D13705 Bus Interface
This section is a summary of the host bus interface modes available on the S1D13705 that
would be used to interface to the PC Card bus.
The S1D13705 implements a 16-bit interface to the host microprocessor which may operate
in one of several modes compatible with most of the popular embedded microprocessor
families. The interface mode used for the PC Card bus is:
• Generic #2 (External Chip Select, shared Read/Write Enable for high byte, individual
Read/Write Enable for low byte).
3.1 Host Bus Pin Connection
The following table shows the functions of the host bus interface signals.
For details on configuration, refer to the S1D13705 Hardware Functional Specification,
document number X27A-A-001-xx.
Table 3-1: Host Bus Interface Pin Mapping
S1D13705
Pin Names
Generic #2
AB[15:1] A[15:1]
AB0 A0
DB[15:0] D[15:0]
WE1# BHE#
CS# External Decode
BCLK BCLK
BS# connect to IO V
DD
RD/WR# connect to IO V
DD
RD# RD#
WE0# WE#
WAIT# WAIT#
RESET# RESET#