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Page 8 EPSON Research and Development
Vancouver Design Center
S5U13704/5 - TMPR3912/22U CPU Module
X00A-G-004-02 Issue Date: 01/03/07
2 S1D13704/5 Bus Interface
This section is summary of the bus interface modes available on the S1D13704 and
S1D13705 LCDCs, and offers some detail on the Generic #2 bus mode used to implement
the interface to the TMPR3912/22U.
2.1 Bus Interface Modes
The S1D13704/5 implements a general-purpose 16-bit interface to the host microprocessor,
which may operate in one of several modes compatible with most of the popular embedded
microprocessor families.
Bus interface mode selections are made during reset by sampling the state of the configu-
ration pins CNF[2:0] and the BS# line. Table 5-1 in the S1D13704 or S1D13705 Hardware
Functional Specification details the values needed for the configuration pins and BS# to
select the desired mode.