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Page 20 Epson Research and Development
Vancouver Design Center
S1D13705 S5U13705B00C Rev. 1.0 ISA Bus Evaluation Board User Manual
X27A-G-005-03 Issue Date: 01/02/13
8 Schematic Diagrams
Figure 8-1: S1D13705B00C Schematic Diagram (1 of 4)
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
A A
B B
C C
D D
By-pass Capacitors (1 per power pin)
1 2 5.0V IOVDD
2 3 3.3V IOVDD
1.0
Epson Research & Development, Inc.
S5U13705B00C ISA-Bus Rev. 1.0 Evaluation Board : 13705F00A Chip
B
14Monday, January 04, 1999
Size Document Number Rev
Date: Sheet
of
FPDAT2
SD2
FPDAT4SD11
SD4
SA3
SD13
SD5 FPDAT[0..7]
SD6
SA15
SD8
SA7
FPDAT0
SD10
SD7
SD1
SA[0..19]
SD[0..15]
SD12
SD3
SA2
SA5
SD14
SA13
SA1
FPDAT3
SA4
SA0
SD15
SA10
SA9
SA8
FPDAT1
SD9
SD0
SA14
SA12
SA11
SA6
FPDAT5
FPDAT6
FPDAT7
CNF2
CNF1
CNF2
CNF0
CNF3
CNF3
CNF[0..3]
CNF1
CNF0
SA16
3.3V
IOVDD
3.3V
IOVDD
IOVDD IOVDD
IOVDD
VCC
C1
0.1uF
C6
0.1uF
C7
0.1uF
C5
0.1uF
JP3
HEADER 3
1
2
3
JP2
HEADER 3
1
2
3
R4
15K
R3
15K
R2
15K
R1
15K
R5
15K
C2
0.1uF
C4
0.1uF
C3
0.1uF
JP1
HEADER 3
1
2
3
R6
15K
S1
SW DIP-6
1
2
3
4
5
6
12
11
10
9
8
7
U1
S1D13705F00A
AB0
70
AB1
69
AB2
68
AB3
67
AB4
66
AB5
65
AB6
64
AB7
63
AB8
62
AB9
59
AB10
58
AB11
57
AB12
56
AB13
55
AB14
54
AB15
53
FPDAT0
37
FPDAT1
36
FPDAT2
35
FPDAT3
34
FPDAT5
32
FPDAT6
31
FPDAT7
30
CS#
74
LCDPWR
43
COREVDD
61
VSS
20
VSS
40
VSS
72
VSS
60
VSS
50
VSS
27
VSS
80
DB0
19
DB1
18
DB2
17
DB3
16
DB4
15
DB5
14
DB6
13
DB7
12
DB8
11
DB9
9
DB10
8
DB11
7
DB12
6
DB13
5
DB14
4
DB15
3
FPDAT4
33
CNF0
49
CNF1
48
CNF2
47
CNF3
46
AB16
45
RD/WR#
79
WE1#
78
WE0#
77
RD#
76
BS#
75
RESET#
73
CLKI
51
BCLK
71
WAIT#
2
TESTEN
44
COREVDD
1
COREVDD
21
IOVDD
10
COREVDD
41
IOVDD
52
IOVDD
29
FPDAT8/GPIO1
26
FPDAT9GPIO2
25
FPDAT10/GPIO3
24
FPDAT11/GPIO4
23
FPFRAME
39
FPLINE
38
FPSHIFT
28
DRDY
42
GPIO0
22
SD[0..15]
LCDPWR
DRDY
FPFRAME
FPLINE
FPSHIFT
FPDAT[0..7]
RD/WR#
WE1#
WE0#
CS#
BUSCLK
CLKI
RESET#
RD#
WAIT#
BS#
SA[0..19]
FPDAT8
FPDAT9
FPDAT10
FPDAT11
CNF[0..3]
SUSPEND
BS# RD/WR#
CNF[0..3]
SUSPEND
ADDR