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Page 78 Epson Research and Development
Vancouver Design Center
S1D13705 Hardware Functional Specification
X27A-A-001-10 Issue Date: 02/02/01
12.1.1 How to Set Up Default SwivelView Mode
The following describes the register settings needed to set up Default SwivelView Mode
for a 240x320x8 bpp image:
• Select Default SwivelView Mode: REG[1Bh] bit 7 = 1 and bit 6 = 0
• The display refresh circuitry starts at pixel “B”, therefore the Screen 1 Start Address
register must be programmed with the address of pixel “B”, i.e.
• The Line Byte Count Register for SwivelView Mode must be set to the virtual-image
width in bytes, i.e.
• Panning is achieved by changing the Screen 1 Start Address register:
• Increment the register by 1 to pan horizontally by one byte, e.g. one pixel in 8 bpp
mode
• Increment the register by twice the effective value of the Line Byte Count register to
pan vertically by two lines, e.g. add 200h to pan by two lines in the example above.
Note
Vertical panning by a single line is not supported in Default SwivelView Mode.
REG[10h], REG[0Dh], REG[0Ch] AddressOfPixelB=
AddressOfPixelA ByteOffset+()=
AddressOfPixelA
240pixels 8bpp×
8bpb
--------------------------------------------
1–+=
AddressOfPixelA EFh+=
Where bpp is bits-per-pixel and bpb is bits-per-byte.
REG 1Ch[]
256
8bpb()8bpp()÷
------------------------------------------
256
1
--------- 256 00h :see REG[1Ch] for explanation====
Where bpb is bits-per-byte and bpp is bits-per-pixel.