Intel IXF1104 Switch User Manual


 
IXF1104 4-Port Gigabit Ethernet Media Access Controller
20 Datasheet
Document Number: 278757
Revision Number: 007
Revision Date: March 25, 2004
2.0 General Description
The IXF1104 provides up to a 4.0 Gbps interface to four individual 10/100/1000 Mbps full-duplex
or 10/100 Mbps half-duplex-capable Ethernet Media Access Controllers (MACs). The network
processor is supported through a System Packet Interface Phase 3 (SPI3) media interface. The
following PHY interfaces are selected on a per-port basis:
Serializer/Deserializer (SerDes) with Optical Module Interface support
Gigabit Media Independent Interface (GMII)
Reduced Gigabit Media Independent Interface (RGMII).
Figure 1 illustrates the IXF1104 block diagram.
Figure 1. Block Diagram
Forwarding Engine/Network Processor
CPU
Intel
®
IXF1104 MAC
SerDes/RGMII/GMII Interface
MDIO
SPI3
uP IF
PHY 1 Device
PHY 2 Device
PHY 3 Device
PHY 4 Device
B3175-0
1