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Contents
4 Datasheet
Document Number: 278757
Revision Number: 007
Revision Date: March 25, 2004
5.1.5.1 Speed.....................................................................................................77
5.1.5.2 Duplex....................................................................................................77
5.1.5.3 Copper Auto-Negotiation .......................................................................77
5.1.6 Jumbo Packet Support ..........................................................................................77
5.1.6.1 Rx Statistics...........................................................................................78
5.1.6.2 TX Statistics...........................................................................................78
5.1.6.3 Loss-less Flow Control...........................................................................78
5.1.7 Packet Buffer Dimensions .....................................................................................79
5.1.7.1 TX and RX FIFO Operation ...................................................................79
5.1.8 RMON Statistics Support.......................................................................................79
5.1.8.1 Conventions...........................................................................................81
5.1.8.2 IXF1104 Advantages .............................................................................82
5.2 SPI3 Interface.....................................................................................................................82
5.2.1 MPHY Operation....................................................................................................83
5.2.1.1 SPI3 RX Round Robin Data Transmission ............................................83
5.2.2 MPHY Logical Timing............................................................................................83
5.2.2.1 Transmit Timing .....................................................................................84
5.2.2.2 Receive Timing......................................................................................84
5.2.2.3 Clock Rates............................................................................................86
5.2.2.4 Parity......................................................................................................86
5.2.2.5 SPHY Mode...........................................................................................86
5.2.2.6 SPHY Logical Timing.............................................................................87
5.2.2.7 Transmit Timing (SPHY)........................................................................87
5.2.2.8 Receive Timing (SPHY).........................................................................87
5.2.2.9 SPI3 Flow Control..................................................................................90
5.2.3 Pre-Pending Function............................................................................................92
5.3 Gigabit Media Independent Interface (GMII) ......................................................................92
5.3.1 GMII Signal Multiplexing........................................................................................93
5.3.2 GMII Interface Signal Definition.............................................................................93
5.4 Reduced Gigabit Media Independent Interface (RGMII) ....................................................95
5.4.1 Multiplexing of Data and Control............................................................................95
5.4.2 Timing Specifics.....................................................................................................96
5.4.3 TX_ER and RX_ER Coding...................................................................................96
5.4.3.1 In-Band Status .......................................................................................98
5.4.4 10/100 Mbps Functionality.....................................................................................98
5.5 MDIO Control and Interface................................................................................................98
5.5.1 MDIO Address.......................................................................................................99
5.5.2 MDIO Register Descriptions ..................................................................................99
5.5.3 Clear When Done ..................................................................................................99
5.5.4 MDC Generation....................................................................................................99
5.5.4.1 MDC High-Frequency Operation ...........................................................99
5.5.4.2 MDC Low-Frequency Operation ............................................................99
5.5.5 Management Frames...........................................................................................100
5.5.6 Single MDI Command Operation.........................................................................100
5.5.7 MDI State Machine..............................................................................................100
5.5.8 Autoscan Operation.............................................................................................102
5.6 SerDes Interface...............................................................................................................102
5.6.1 Features...............................................................................................................102
5.6.2 Functional Description .........................................................................................102
5.6.2.1 Transmitter Operational Overview .......................................................103
5.6.2.2 Transmitter Programmable Driver-Power Levels.................................103