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CHAPTER 10 8-BIT TIMER/EVENT COUNTERS 5 AND 6
10.4.2 External event counter operation
The external event counter counts the number of external clock pulses to be input to the TI5/P100/TO5 and TI6/
P101/TO6 pins with 8-bit timer registers 5 and 6 (TM5 and TM6).
TM5 and TM6 are incremented each time the valid edge specified with timer clock select registers 5 and 6 (TCL5
and TCL6) is input. Either rising or falling edge can be selected.
When the TM5 and TM6 counted values match the values of 8-bit compare registers (CR50 and CR60), TM5
and TM6 are cleared to 0 and the interrupt request signals (INTTM5 and INTTM6) are generated.
Figure 10-10. 8-Bit Timer Mode Control Register Setting for External Event Counter Operation
Remarks 1. n = 5, 6
2. x : Don’t care
Figure 10-11. External Event Counter Operation Timings (with Rising Edge Specified)
Remarks 1. N = 00H to FFH
2. n = 5, 6
1
TCEn
0
TMCn6
00x
LVSn LVRn TMCn1 TOEn
TMCn
xx0
TOn output disable
Clear & start mode on match of TMn and CRn0
TMn operation enable
00 01 13
N
Count Clock
TMn Count Value
CRn0
TCEn
INTTMn
05 N – 1 00 02 030102 04 N