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5-40 Operating Registers
the first SCRIPTS instruction is written to this register,
SCRIPTS instructions are automatically fetched and
executed until an interrupt condition occurs.
In single step mode, there is a single step interrupt after
each instruction is executed. The DMA SCRIPTS Pointer
(DSP) register does not need to be written with the next
address, but the Start DMA bit (bit 2, DMA Control
(DCNTL) register) must be set each time the step
interrupt occurs to fetch and execute the next SCRIPTS
command. When writing this register eight bits at a time,
writing the upper eight bits begins execution of the SCSI
SCRIPTS. The default value of this register is zero.
Registers:0x30–0x33 (0xB0–0xB3)
DMA SCRIPTS Pointer Save (DSPS)
Read/Write
DSPS DMA SCRIPTS Pointer Save [31:0]
This register contains the second Dword of a SCRIPTS
instruction. It is overwritten each time a SCRIPTS
instruction is fetched. When a SCRIPTS interrupt
instruction is executed, this register holds the interrupt
vector. The power-up value of this register is
indeterminate.
31 0
DSPS
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