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5-4 Operating Registers
4. The LSI53C810A repeats arbitration until it wins
control of the SCSI bus. When it wins, the Won
Arbitration bit is set in the SCSI Status Zero
(SSTAT0) register, bit 2.
5. The LSI53C810A performs selection by asserting
the following onto the SCSI bus: SSEL/, the target’s
ID (stored in the SCSI Destination ID (SDID)
register), and the LSI53C810A’s ID (stored in the
SCSI Chip ID (SCID) register).
6. After a selection is complete, the Function Complete
bit is set in the SCSI Interrupt Status Zero (SIST0)
register, bit 6.
7. If a selection time-out occurs, the Selection
Time-Out bit is set in the SCSI Interrupt Status One
(SIST1) register, bit 2.
START Start Sequence 5
When this bit is set, the LSI53C810A starts the arbitration
sequence indicated by the Arbitration Mode bits. The
Start Sequence bit is accessed directly in low level mode;
during SCSI SCRIPTS operations, this bit is controlled by
the SCRIPTS processor. Do not start an arbitration
sequence if the connected (CON) bit in the SCSI Control
One (SCNTL1) register, bit 4, indicates that the
LSI53C810A is already connected to the SCSI bus. This
bit is automatically cleared when the arbitration sequence
is complete. If a sequence is aborted, check bit 4 in the
SCSI Control One (SCNTL1) register to verify that the
LSI53C810A is not connected to the SCSI bus.
WATN Select with SATN/ on a Start Sequence 4
When this bit is set and the LSI53C810A is in the initiator
mode, the SATN/ signal is asserted during selection of a
SCSI target device. This is to inform the target that the
LSI53C810A has a message to send. If a selection
time-out occurs while attempting to select a target device,
SATN/ is deasserted at the same time SSEL/ is
deasserted. When this bit is cleared, the SATN/ signal is
not asserted during selection. When executing SCSI
SCRIPTS, this bit is controlled by the SCRIPTS
processor, but manual setting is possible in low level
mode.