I/O Instruction 6-17
Clear Instruction
When the SACK/ or SATN/ bits are cleared, the
corresponding bits are cleared in the SCSI Output Con-
trol Latch (SOCL) register. Do not set SACK/ or SATN/
except for testing purposes. When the target bit is
cleared, the corresponding bit in the SCSI Control Zero
(SCNTL0) register is cleared. When the carry bit is
cleared, the corresponding bit in the ALU is cleared.
Note: None of the signals are cleared on the SCSI bus in Target
mode.
Initiator Mode
Select Instruction
1. The LSI53C810A arbitrates for the SCSI bus by
asserting the SCSI ID stored in the SCSI Chip ID
(SCID) register. If it loses arbitration, it tries again
during the next available arbitration cycle without
reporting any lost arbitration status.
2. If the LSI53C810A wins arbitration, it attempts to
select the SCSI device whose ID is defined in the
destination ID field of the instruction. Once the
LSI53C810A wins arbitration, it fetches the next
instruction from the address pointed to by the DMA
SCRIPTS Pointer (DSP) register. This way the
SCRIPTS can move to the next instruction before the
selection completes. It continues executing SCRIPTS
until a SCRIPT that requires a response from the
Target is encountered.
3. If the LSI53C810A is selected or reselected before
winning arbitration, it fetches the next instruction from
the address pointed to by the 32-bit jump address
OPC2 OPC1 OPC0 Instruction Defined
0 0 0 Select
0 0 1 Wait Disconnect
0 1 0 Wait Reselect
0 1 1 Set
1 0 0 Clear