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2-2 Functional Description
and diagnostic procedures. In support of loopback diagnostics, the SCSI
core can perform a self-selection and operate as both an initiator and a
target.
The SCSI core is controlled by the integrated SCRIPTS processor
through a high-level logical interface. Commands controlling the SCSI
core are fetched out of the main host memory or local memory. These
commands instruct the SCSI core to Select, Reselect, Disconnect, Wait
for a Disconnect, Transfer Information, Change Bus Phases and, in
general, implement all aspects of the SCSI protocol. The SCRIPTS
processor is a special high-speed processor optimized for SCSI protocol.
2.1.1 DMA Core
The DMA core is a bus master DMA device that attaches directly to the
industry standard PCI bus. The DMA core is tightly coupled to the SCSI
core through the SCRIPTS processor, which supports uninterrupted
scatter/gather memory operations.
The LSI53C810A supports 32-bit memory and automatically supports
misaligned DMA transfers. An 80-byte FIFO allows 2, 4, 8, or 16 Dword
bursts across the PCI bus interface to run efficiently without throttling the
bus during PCI bus latency.
2.2 SCRIPTS Processor
The SCSI SCRIPTS processor allows both DMA and SCSI commands
to be fetched from host memory. Algorithms written in SCSI SCRIPTS
control the actions of the SCSI and DMA cores and are executed from
32-bit system RAM. The SCRIPTS processor executes complex SCSI
bus sequences independently of the host CPU.
The SCRIPTS processor can begin a SCSI I/O operation in
approximately 500 ns. This compares with 2–8 ms required for traditional
intelligent host adapters. Algorithms may be designed to tune SCSI bus
performance, to adjust to new bus device types (such as scanners,
communication gateways, etc.), or to incorporate changes in the SCSI-2
or SCSI-3 logical bus definitions without sacrificing I/O performance.
SCSI SCRIPTS are hardware independent, so they can be used
interchangeably on any host or CPU system bus.