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PCI Interface Timing Diagrams 7-23
Figure 7.17 Burst Read (Cont.)
t
1
CMD
t
2
BE
Data In
Out
In In
Out
In
BE
Addr
Out
CLK
GPIO0_FETCH/
(Driven by LSI53C810A)
GPIO1_MASTER/
(Driven by LSI53C810A)
REQ/
(Driven by LSI53C810A)
PAR
(Driven by LSI53C810A-
IRDY/
(Driven by LSI53C810A)
TRDY/
(Driven by Target)
STOP/
(Driven by Target)
DEVSEL/
(Driven by Target)
AD
(Driven by LSI53C810A-
C_BE/
(Driven by LSI53C810A)
GNT/
(Driven by Arbiter)
FRAME/
(Driven by LSI53C810A)
Addr; Target-Data)
Addr; Target-Data)