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ERMP Enable Read Multiple 2
Setting this bit causes Read Multiple commands to be
issued on the PCI bus after certain conditions have been
met. These conditions are described in Chapter 3, “PCI
Functional Description.”
BOF Burst Opcode Fetch Enable 1
Setting this bit causes the LSI53C810A to fetch
instructions in burst mode, if the Burst Disable bit (Chip
Test Four (CTEST4), bit7) is cleared. Specifically, the chip
bursts in the first two Dwords of all instructions using a
single bus ownership. If the instruction is a Memory-to-
Memory Move type, the third Dword is accessed in a
subsequent bus ownership. If the instruction is an indirect
type, the additional Dword is accessed in a subsequent
bus ownership. If the instruction is a table indirect block
move type, the chip accesses the remaining two Dwords
in a subsequent bus ownership, thereby fetching the four
Dwords required in two bursts of two Dwords each.
MAN Manual Start Mode 0
Setting this bit prevents the LSI53C810A from
automatically fetching and executing SCSI SCRIPTS
when the DMA SCRIPTS Pointer (DSP) register is
written. When this bit is set, the Start DMA bit in the DMA
Control (DCNTL) register must be set to begin SCRIPTS
execution. Clearing this bit causes the LSI53C810A to
automatically begin fetching and executing SCSI
SCRIPTS when the DMA SCRIPTS Pointer (DSP)
register is written. This bit normally is not used for SCSI
SCRIPTS operations.