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1-4 General Description
1.2.2 PCI Performance
To improve PCI performance, the LSI53C810A:
• Bursts 2, 4, 8, or 16 Dwords across PCI bus with 80-byte DMA FIFO
• Prefetches up to 8 Dwords of SCRIPTS instructions
• Supports 32-bit word data bursts with variable burst lengths.
• Bursts SCRIPTS opcode fetches across the PCI bus
• Performs zero wait-state bus master data bursts faster than
110 Mbytes/s (@ 33 MHz)
• Supports PCI Cache Line Size register
1.2.3 Integration
Features of the LSI53C810A which ease integration include:
• 3.3 V/5 V PCI interface
• Full 32-bit PCI DMA bus master
• DMA controller using Memory-to-Memory Move instructions
• High-performance SCSI core
• Integrated SCRIPTS processor
• Compact 100-pin PQFP packaging
1.2.4 Ease of Use
The LSI53C810A provides:
• Direct PCI-to-SCSI connection
• Reduced SCSI development effort
• Support for the ASPI software standard using SDMS software
• Compatibility with existing LSI53C7XX and LSI53C8XX family
SCRIPTS
• Direct connection to PCI and SCSI SE bus
• Development tools and sample SCSI SCRIPTS
• Maskable and pollable interrupts