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Configuration Registers 3-9
3.3 Configuration Registers
The Configuration registers are accessible only by system BIOS during
PCI configuration cycles, and are not available to the user at any time.
No other cycles, including SCRIPTS operations, can access these
registers.
The lower 128 bytes hold configuration data while the upper 128 bytes
hold the LSI53C810A operating registers, which are described in
Chapter 5, “Operating Registers.” The operating registers can be
accessed by SCRIPTS or the host processor.
Table 3.1 PCI Bus Commands and Encoding Types
C_BE[3:0] Command Type Supported as Master Supported as Slave
0b0000 Interrupt Acknowledge No No
0b0001 Special Cycle No No
0b0010 I/O Read Yes Yes
0b0011 I/O Write Yes Yes
0b0100 Reserved N/A N/A
0b0101 Reserved N/A N/A
0b0110 Memory Read Yes Yes
0b0111 Memory Write Yes Yes
0b1000 Reserved N/A N/A
0b1001 Reserved N/A N/A
0b1010 Configuration Read No Yes
0b1011 Configuration Write No Yes
0b1100 Memory Read Multiple Yes No (defaults to 0110)
0b1101 Dual Address Cycle (DAC) No No
0b1110 Memory Read Line Yes No (defaults to 0110)
0b1111 Memory Write and Invalidate Yes No (defaults to 0111)