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6-2 Instruction Set of the I/O Processor
6.2 SCSI SCRIPTS
To operate in the SCSI SCRIPTS mode, the LSI53C810A requires only
a SCRIPTS start address. The start address must be at a Dword (four
byte) boundary. This aligns subsequent SCRIPTS at a Dword boundary
since all SCRIPTS are 8 or 12 bytes long. All instructions are fetched
from external memory. The LSI53C810A fetches and executes its own
instructions by becoming a bus master on the host bus and fetching two
or three 32-bit words into its registers. Instructions are fetched until an
interrupt instruction is encountered, or until an unexpected event (such
as a hardware error) causes an interrupt to the external processor.
Once an interrupt is generated, the LSI53C810A halts all operations until
the interrupt is serviced. Then, the start address of the next SCRIPTS
instruction may be written to the DMA SCRIPTS Pointer (DSP) register
to restart the automatic fetching and execution of instructions.
The SCSI SCRIPTS mode of execution allows the LSI53C810A to make
decisions based on the status of the SCSI bus, which offloads the
microprocessor from servicing the numerous interrupts inherent in I/O
operations.
Given the rich set of SCSI oriented features included in the instruction
set, and the ability to re-enter the SCSI algorithm at any point, this high
level interface is all that is required for both normal and exception
conditions. Switching to low level mode for error recovery should never
be required.
The following types of SCRIPTS instructions are implemented in the
LSI53C810A as shown in Table 6.1: