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5-1
CHAPTER 5
CLOCK GENERATION AND POWER
MANAGEMENT
The clock generation and distribution circuits provide uniform clock signals for the Execution
Unit, the Bus Interface Unit and all integrated peripherals. The 80C186 Modular Core Family
processors have additional logic that controls the clock signals to provide power management
functions.
5.1 CLOCK GENERATION
The clock generation circuit (Figure 5-1) includes a crystal oscillator, a divide-by-two counter
and power-save and reset circuitry. See “Power-Save Mode” on page 5-11 for a discussion of
Power-Save mode as a power management option.
Figure 5-1. Clock Generator
5.1.1 Crystal Oscillator
The internal oscillator is a parallel resonant Pierce oscillator, a specific form of the common
phase shift oscillator.
X1
X2
RES
÷ 2
Clock
Clock
Divider
Phase
Drivers
Schmitt Trigger
"Squares-up" CLKIN
Reset Circuitry
Power Save
Internal
Phase
Clocks
To CLKOUT
Internal Reset
1
2
A1519-0A