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8-19
INTERRUPT CONTROL UNIT
Figure 8-10. In-Service Register
8.4.6 Poll and Poll Status Registers
The Poll and Poll Status registers allow you to poll the Interrupt Control Unit and service inter-
rupts through software. You can read these registers to determine whether an interrupt is pending
and, if so, the interrupt type. The registers contain identical information, but reading them pro-
duces different results.
Register Name: In-Service Register
Register Mnemonic: INSERV
Register Function: Indicates which interrupt handlers are in process
Bit
Mnemonic
Bit Name
Reset
State
Function
INT3:0 External
Interrupt In-
Service
0000 0 A bit is set to indicate that the corresponding
external interrupt is being serviced.
DMA1:0 DMA
Interrupt In-
Service
0 This bit is set to indicate that the corresponding
DMA channel interrupt is being serviced.
TMR Timer
Interrupt In-
Service
0 This bit is set to indicate that a timer interrupt is
being serviced.
NOTE: Reserved register bits are shown with gray shading. Reserved bits must be written
to a logic zero to ensure compatibility with future Intel products.
A1192-A0
15 0
T
M
R
D
M
A
0
D
M
A
1
I
N
T
0
I
N
T
1
I
N
T
2
I
N
T
3