Intel 80C186XL Computer Hardware User Manual


 
OVERVIEW OF THE 80C186 FAMILY ARCHITECTURE
2-2
Figure 2-1. Simplified Functional Block Diagram of the 80C186 Family CPU
2.1.1 Execution Unit
The Execution Unit executes all instructions, provides data and addresses to the Bus Interface
Unit and manipulates the general registers and the Processor Status Word. The 16-bit ALU within
the Execution Unit maintains the CPU status and control flags and manipulates the general reg-
isters and instruction operands. All registers and data paths in the Execution Unit are 16 bits wide
for fast internal transfers.
SP
BP
SI
DI
ALU
Σ
AH
BH
CH
DH
AL
BL
CL
DL
General
Registers
Data
Bus
(16 Bits)
Address Bus (20 Bits)
(16 Bits)
Temporary
Registers
Flags
Q Bus
(8 Bits)
EU
Control
System
Bus
Control
Logic
Instruction Queue
Execution Unit
(EU)
Bus Interface Unit
(BIU)
External
Bus
ALU Data Bus
123456
DS
CS
SS
ES
IP
Internal
Communications
Registers
A1012-0A