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INSTRUCTION SET OPCODES AND CLOCK CYCLES
D-4
ARITHMETIC INSTRUCTIONS (Continued)
SUB = Subtract
reg/memory with register to either
0 0 1 0 1 0 d w mod reg r/m 3/10
immediate from register/memory
1 0 0 0 0 0 s w mod 101 r/m data data if sw=01 4/16
immediate from accumulator
0 0 0 1 1 1 0 w data data if w=1 3/4 (1)
SBB = Subtract with borrow
reg/memory with register to either
0 0 0 1 1 0 d w mod reg r/m 3/10
immediate from register/memory
1 0 0 0 0 0 s w mod 011 r/m data data if sw=01 4/16
immediate from accumulator
0 0 0 1 1 1 0 w data data if w=1 3/4 (1)
DEC = Decrement
register/memory
1 1 1 1 1 1 1 w mod 001 r/m 3/15
register
0 1 0 0 1 reg 3
NEG = Change sign 1 1 1 1 0 1 1 w mod reg r/m 3
CMP = Compare
register/memory with register
0 0 1 1 1 0 1 w mod reg r/m 3/10
register with register/memory
0 0 1 1 1 0 0 w mod reg r/m 3/10
immediate with register/memory
1 0 0 0 0 0 s w mod 111 r/m data data if sw=01 3/10
immediate with accumulator
0 0 1 1 1 1 0 w data data if w=1 3/4 (1)
AAS = ASCII adjust for subtraction 0 0 1 1 1 1 1 1 7
DAS = Decimal adjust for subtraction 0 0 1 0 1 1 1 1 4
MUL = multiply (unsigned) 1 1 1 1 0 1 1 w mod 100 r/m
register-byte
26-28
register-word
35-37
memory-byte
32-34
memory-word
41-43
IMUL = Integer multiply (signed) 1 1 1 1 0 1 1 w mod 101 r/m
register-byte
25-28
register-word
34-37
memory-byte
31-34
memory-word
40-43
integer immediate multiply (signed)
0 1 1 0 1 0 s 1 mod reg r/m data data if s=0 22-25/
29-32
Table D-2. Instruction Set Summary (Continued)
Function Format Clocks Notes
NOTES:
1. Clock cycles are given for 8-bit/16-bit operations.
2. Clock cycles are given for jump not taken/jump taken.
3. Clock cycles are given for interrupt taken/interrupt not taken.
4. If TEST
= 0
Shading indicates additions and enhancements to the 8086/8088 instruction set. See Appendix A, “80C186
Instruction Set Additions and Extensions,” for details.