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REFRESH CONTROL UNIT
7-10
Figure 7-8. Refresh Control Register
7.7.3 Programming Example
Example 7-1 contains sample code to initialize the Refresh Control Unit. Example 5-2 on page
5-14 shows the additional code to reprogram the Refresh Control Unit upon entering Power-Save
mode.
Register Name: Refresh Control Register
Register Mnemonic: RFCON
Register Function: Controls Refresh Unit operation.
Bit
Mnemonic
Bit Name
Reset
State
Function
REN Refresh
Control Unit
Enable
0 Setting REN enables the Refresh Unit. Clearing
REN disables the Refresh Unit.
RC8:0 Refresh
Counter
000H These bits contain the present value of the
down-counter that triggers refresh requests.
The user cannot program these bits.
NOTE: Reserved register bits are shown with gray shading. Reserved bits must be written
to a logic zero to ensure compatibility with future Intel products.
15 0
R
C
0
R
C
1
R
C
2
R
C
3
R
C
4
R
C
5
R
C
6
R
C
7
R
C
8
R
E
N
A1311-0A