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INSTRUCTION SET OPCODES AND CLOCK CYCLES
D-16
mod 111 r/m data-8 sar reg16/mem16, immed8
C2 1100 0010 data-lo data-hi ret immed16 (intrasegment)
C3 1100 0011 ret (intrasegment)
C4 1100 0100 mod reg r/m (disp-lo),(disp-hi) les reg16,mem16
C5 1100 0101 mod reg r/m (disp-lo),(disp-hi) lds reg16,mem16
C6 1100 0110 mod 000 r/m (disp-lo),(disp-hi),data-8 mov mem8,immed8
mod 001 r/m —
mod 010 r/m —
mod 011 r/m —
mod 100 r/m —
mod 101 r/m —
mod 110 r/m —
C6 1100 0110
mod 111 r/m —
C7 1100 0111 mod 000 r/m (disp-lo),(disp-hi),data-lo,data-hi mov mem16,immed16
mod 001 r/m —
mod 010 r/m —
mod 011 r/m —
mod 100 r/m —
mod 101 r/m —
mod 110 r/m —
mod 111 r/m —
C8 1100 1000 data-lo data-hi, level enter immed16, immed8
C9 1100 1001 leave
CA 1100 1010 data-lo data-hi ret immed16 (intersegment)
CB 1100 1011 ret (intersegment)
CC 1100 1100 int 3
CD 1100 1101 data-8 int immed8
CE 1100 1110 into
CF 1100 1111 iret
D0 1101 0000 mod 000 r/m (disp-lo),(disp-hi) rol reg8/mem8,1
mod 001 r/m (disp-lo),(disp-hi) ror reg8/mem8,1
mod 010 r/m (disp-lo),(disp-hi) rcl reg8/mem8,1
mod 011 r/m (disp-lo),(disp-hi) rcr reg8/mem8,1
mod 100 r/m (disp-lo),(disp-hi) sal/shl reg8/mem8,1
mod 101 r/m (disp-lo),(disp-hi) shr reg8/mem8,1
mod 110 r/m —
mod 111 r/m (disp-lo),(disp-hi) sar reg8/mem8,1
Table D-3. Machine Instruction Decoding Guide (Continued)
Byte 1
Byte 2 Bytes 3–6 ASM-86 Instruction Format
Hex Binary