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SCSI Registers 4-25
SCSI Control Zero (SCNTL0) register are set for full
arbitration and selection before setting this bit.
Arbitration is retried until won. At that point, the
LSI53C875A holds SBSY and SSEL asserted, and waits
for a select or reselect sequence. The Immediate
Arbitration bit is cleared automatically when the selection
or reselection sequence is completed, or times out.
An unexpected disconnect condition clears IARB with it
attempting arbitration. See the SCSI Disconnect
Unexpected bit (SCSI Control Two (SCNTL2),bit7)for
more information on expected versus unexpected
disconnects.
It is possible to abort an immediate arbitration sequence.
First, set the Abort bit in the Interrupt Status Zero
(ISTAT0) register. Then one of two things eventually
happens:
• The Won Arbitration bit (SCSI Status Zero (SSTAT0),
bit 2) will be set. In this case, the Immediate
Arbitration bit needs to be cleared. This completes the
abort sequence and disconnects the chip from the
SCSI bus. If it is not acceptable to go to Bus Free
phase immediately following the arbitration phase, it is
possible to perform a low level selection instead.
• The abort completes because the LSI53C875A loses
arbitration. This is detected by the clearing of the
Immediate Arbitration bit. Do not use the Lost
Arbitration bit (SCSI Status Zero (SSTAT0),bit3)to
detect this condition. In this case take no further
action.
SST Start SCSI Transfer 0
This bit is automatically set during SCRIPTS execution
and should not be used. It causes the SCSI core to begin
a SCSI transfer, including SREQ/ and SACK/
handshaking. The determination of whether the transfer
is a send or receive is made according to the value
written to the I/O bit in SCSI Output Control Latch
(SOCL). This bit is self-clearing. Do not set it for low level
operation.