LSI 53C875A Computer Hardware User Manual


 
1-8 General Description
SCSI clock quadrupler bits enable Ultra SCSI transfer rates with a 20
or 40 MHz SCSI clock input.
Selectable IRQ pin disable bit.
Ability to route system clock to SCSI clock.
Compatible with 3.3 V and 5 V PCI.
1.4.6 Reliability
Enhanced reliability features of the LSI53C875A include:
2 kV ESD protection on SCSI signals.
Protection against bus reflections due to impedance mismatches.
Controlled bus assertion times (reduces RFI, improves reliability, and
eases FCC certification).
Latch-up protection greater than 150 mA.
Voltage feed-through protection (minimum leakage current through
SCSI pads).
High proportion (> 25%) of device pins are power or ground.
Power and ground isolation of I/O pads and internal chip logic.
TolerANT technology, which provides:
Active negation of SCSI Data, Parity, Request, and Acknowledge
signals for improved fast SCSI transfer rates.
Input signal filtering on SCSI receivers improves data integrity,
even in noisy cabling environments.
1.4.7 Testability
The LSI53C875A provides improved testability through:
Access to all SCSI signals through programmed I/O.
SCSI loopback diagnostics.
SCSI bus signal continuity checking.
Support for single step mode operation.
JTAG boundary scan.