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2-12 Functional Description
• Multiple Memory Write and Invalidates.
• A single data residual Memory Write to complete the transfer.
Table 2.2 describes PCI cache mode alignment.
Table 2.2 PCI Cache Mode Alignment
Host Memory
A00h
B04h
08h
C0Ch
D10h
14h
18h
1Ch
E20h
24h
28h
2Ch
F30h
34h
38h
3Ch
G40h
44h
48h
4Ch
H50h
54h
58h
5Ch
60h