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SCSI Registers 4-49
clear the ID Mode bit or any of the PCI configuration
registers. This bit is not self-clearing; it must be cleared
to clear the reset condition (a hardware reset also clears
this bit).
SIGP Signal Process 5
SIGP is a R/W bit that is writable at any time, and polled
and reset using C hip Test Two ( CTEST2).TheSIGPbit
is used in various ways to pass a flag to or from a running
SCRIPTS instruction.
The only SCRIPTS instruction directly affected by the
SIGP bit is Wait for Selection/Reselection. Setting this bit
causes that instruction to jump to the alternate address
immediately. The instructions at the alternate jump
address should check the status of SIGP to determine
the cause of the jump. The SIGP bit is usable at any time
and is not restricted to the wait for selection/reselection
condition.
SEM Semaphore 4
The SCRIPTS processor may set this bit using a
SCRIPTS register write instruction. An external processor
may also set it while the LSI53C875A is executing a
SCRIPTS operation. This bit enables the LSI53C875A to
notify an external processor of a predefined condition
while SCRIPTS are running. The external processor may
also notify the LSI53C875A of a predefined condition and
the SCRIPTS processor may take action while SCRIPTS
are executing.
CON Connected 3
This bit is automatically set any time the LSI53C875A is
connected to the SCSI bus as an initiator or as a target.
It is set after successfully completing selection or when
the LSI53C875A responds to a bus-initiated selection or
reselection. It is also set after the LSI53C875A wins
arbitration when operating in low level mode. When this
bit is clear, the LSI53C875A is not connected to the SCSI
bus.
INTF Interrupt-on-the-Fly 2
This bit is asserted by an INTFLY instruction during
SCRIPTS execution. SCRIPTS programs do not halt
whentheinterruptoccurs.Thisbitcanbeusedtonotify
a service routine, running on the main processor while