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I/O Instruction 5-21
R Reserved [8:7]
ACK Set/Clear SACK/ 6
R Reserved [5:4]
ATN Set/Clear SATN/ 3
These two bits are used in conjunction with a Set or Clear
instruction to assert or deassert the corresponding SCSI
control signal. Bit 6 controls the SCSI SACK/ signal. Bit 3
controls the SCSI SATN/ signal.
TheSetinstructionisusedtoassertSACK/and/orSATN/
on the SCSI bus. The Clear instruction is used to
deassert SACK/ and/or SATN/ on the SCSI bus. The
corresponding bit in the SCSI Output Control Latch
(SOCL) register is set or cleared depending on the
instruction used.
Since SACK/ and SATN/ are Initiator signals, they are not
asserted on the SCSI bus unless the LSI53C875A is
operating as an Initiator or the SCSI Loopback Enable bit
is set in the SCSI Test Two (STEST2) register.
The Set/Clear SCSI ACK/, ATN/ instruction is used after
message phase Block Move operations to give the
Initiator the opportunity to assert attention before
acknowledging the last message byte. For example, if the
Initiator wishes to reject a message, it issues an Assert
SCSI ATN instruction before a Clear SCSI ACK
instruction.
R Reserved [2:0]
5.4.2 Second Dword
SA Start Address [31:0]
This 32-bit field contains the memory address to fetch the
next instruction if the selection or reselection fails.
31 0
DMA SCRIPTS Pointer Save (DSPS) Register
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