LSI 53C875A Computer Hardware User Manual


 
IX-10 Index
Ultra SCSI (Cont.)
single-ended transfers
20.0 Mbytes (16-bit transfers)
quadrupled 40 MHz clock 6-56
20.0 Mbytes (8-bit transfers)
40 MHz clock 6-56
synchronous data transfers 2-36
unexpected disconnect (UDC) 4-74, 4-78
updated address (UA) 4-105
upper register address line (A7) 5-23
use data8/SFBR 5-22
V
VDD 3-13
-A 3-13
-core 3-13
vendor
ID (VID) 4-2
unique enhancement, bit 1 (VUE1) 4-27
unique enhancements, bit 0 (VUE0) 4-27
version (VER[2:0]) 4-16
VSS 3-13
-A 3-13
-core 3-13
W
wait
disconnect instruction 5-17
for a disconnect 2-17
for valid phase 5-31
reselect instruction 5-17
select instruction 5-15
wide SCSI
chained block moves 2-44
receive (WSR) 4-28
receive bit 2-46
send (WSS) 4-27
send bit 2-45
won arbitration (WOA) 4-43
write
read instructions 5-22
read system memory from SCRIPTS 5-34
write and invalidate
enable (WIE) 4-4
enable (WRIE) 4-57
WSR bit 2-46
WSS flag 2-45