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4-28 Registers
group codes. If this bit is set, the device does not reload
the Block Move byte count, regardless of the group code.
WSR Wide SCSI Receive 0
When read, this bit returns the value of the Wide SCSI
Receive (WSR) flag. Setting this bit clears the WSR flag.
This clearing function is self-clearing.
The WSR flag indicates that the SCSI core received data
from the SCSI bus, detected a possible partial transfer at
the end of a chained or nonchained block move
command, and temporarily stored the high-order byte in
the SCSI Wide Residue (SWIDE) register rather than
passing the byte out the DMA channel. The hardware
uses the WSR status flag to determine what behavior
must occur at the start of the next data receive transfer.
When the flag is set, the stored data in SWIDE may be
“residue” data, valid data for a subsequent data transfer,
or overrun data. The byte is read as normal data by
starting a data receive transfer.
Performing a SCSI send operation clears this bit. Also,
performing any nonwide transfer clears this bit.
Register: 0x03
SCSI Control Three (SCNTL3)
Read/Write
USE Ultra SCSI Enable 7
Setting this bit enables Ultra SCSI synchronous transfers.
The default value of this bit is 0. This bit should remain
cleared if the LSI53C875A is not operating in Ultra SCSI
mode.
When this bit is set, the signal filtering period for SREQ/
and SACK/ automatically changes to 15 ns for Ultra
SCSI, regardless of the value of the Extend REQ/ACK
Filtering bit in the S CSI Test Two (S TEST 2) register.
Note:
Set this bit to achieve Ultra SCSI transfer rates in legacy
systems that use an 80 MHz clock.
76 432 0
USE SCF[2:0] EWS CCF[2:0]
00000000