Filter
Top Products
USART Registers: SPI Mode
14-22
USART Peripheral Interface, SPI Mode
IFG1, Interrupt Flag Register 1
76543210
UTXIFG0
†
URXIFG0
†
rw−1 rw−0
UTXIFG0
†
Bit 7 USART0 transmit interrupt flag. UTXIFG0 is set when U0TXBUF is empty.
0 No interrupt pending
1 Interrupt pending
URXIFG0
†
Bit 6 USART0 receive interrupt flag. URXIFG0 is set when U0RXBUF has received
a complete character.
0 No interrupt pending
1 Interrupt pending
Bits
5-0
These bits may be used by other modules. See device-specific datasheet.
†
Does not apply to MSP430x12xx devices. See IFG2 for the MSP430x12xx USART0 interrupt flag bits
IFG2, Interrupt Flag Register 2
76543210
UTXIFG1 URXIFG1 UTXIFG0
‡
URXIFG0
‡
rw−1 rw−0 rw−1 rw−0
Bits
7-6
These bits may be used by other modules. See device-specific datasheet.
UTXIFG1
Bit 5 USART1 transmit interrupt flag. UTXIFG1 is set when U1TXBUF is empty.
0 No interrupt pending
1 Interrupt pending
URXIFG1
Bit 4 USART1 receive interrupt flag. URXIFG1 is set when U1RXBUF has received
a complete character.
0 No interrupt pending
1 Interrupt pending
Bits
3-2
These bits may be used by other modules. See device-specific datasheet.
UTXIFG0
‡
Bit 1 USART0 transmit interrupt flag. UTXIFG0 is set when U0TXBUF is empty.
0 No interrupt pending
1 Interrupt pending
URXIFG0
‡
Bit 0 USART0 receive interrupt flag. URXIFG0 is set when U0RXBUF has received
a complete character.
0 No interrupt pending
1 Interrupt pending
‡
MSP430x12xx devices only