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I
2
C Module Registers
15-25
USART Peripheral Interface, I
2
C Mode
I2CPSC, I
2
C Clock Prescaler Register
76543210
I2CPSCx
rw−0 rw−0 rw−0 rw−0 rw−0 rw−0 rw−0 rw−0
Modifiable only when I2CEN = 0
I2CPSCx
Bits
7−0
I
2
C clock prescaler. The I
2
C clock input I2CIN is divided by the I2CPSCx value
to produce the internal I
2
C clock frequency. The division rate is I2CPSCx+1.
I2CPSCx values > 4 are not recommended. The I2CSCLL and I2CSCLH
registers should be used to set the SCL frequency.
000h Divide by 1
001h Divide by 2
:
0FFh Divide by 256