Texas Instruments MSP430x1xx Computer Hardware User Manual


 
I
2
C Module Operation
15-18
USART Peripheral Interface, I
2
C Mode
15.2.8 I
2
C Interrupts
The I
2
C module has one interrupt vector for eight interrupt flags listed in Table
15−3. Each interrupt flag has its own interrupt enable bit. When an interrupt
is enabled, and the GIE bit is set, the interrupt flag will generate an interrupt
request.
Table 15−3.I
2
C Interrupts
Interrupt
Flag
Interrupt Condition
ALIFG
Arbitration-lost. Arbitration can be lost when two or more transmitters
start a transmission simultaneously, or when the software attempts
to initiate an I
2
C transfer while I2CBB = 1. The ALIFG flag is set when
arbitration has been lost. When ALIFG is set the MST and I2CSTP
bits are cleared and the I
2
C controller becomes a slave receiver.
NACKIFG
No-acknowledge interrupt. This flag is set when an acknowledge is
expected but is not received in master mode. NACKIFG is used in
master mode only.
OAIFG
Own-address interrupt. This flag is set when another master has
addressed the I
2
C module. OAIFG is used in slave mode only.
ARDYIFG
Register-access-ready interrupt. This flag is set as described for the
below conditions.
Master transmitter, I2CRM = 0
: All data sent
Master transmitter, I2CRM = 1:
All data sent and I2CSTP set
Master receiver, I2CRM = 0:
I2CNDAT number of bytes received and
all data read from I2CDR
Master receiver, I2CRM = 1:
Last byte of data received, I2CSTP set,
and all data read from I2CDR
Slave transmitter: STOP condition detected
Slave receiver:
STOP condition detected and all data read from
I2CDR
RXRDYIFG
Receive ready interrupt/status. This flag is set when the I
2
C module
has received new data. RXRDYIFG is automatically cleared when
I2CDR is read and the receive buffer is empty. A receiver overrun is
indicated if bit I2CRXOVR = 1. RXRDYIFG is used in receive mode
only.
TXRDYIFG
Transmit ready interrupt/status. This flag is set when the I
2
C module
is ready for new transmit data (master transmit mode) or when
another master is requesting data (slave transmit mode). TXRDYIFG
is automatically cleared when I2CDR and the transmit buffer are full.
A transmit underflow is indicated if I2CTXUDF = 1. Unused in receive
mode.
GCIFG
General call interrupt. This flag is set when the I
2
C module received
the general call address (00h). GCIFG is used in receive mode only.
STTIFG
START condition detected interrupt. This flag is set when the I
2
C
module detects a START condition while in slave mode. This allows
the MSP430 to be in a low power mode with the I
2
C clock source
inactive until a master initiates I
2
C communication. STTIFG is used
in slave mode only.