Mentor v8.6_4 All in One Printer User Manual


 
Command Dictionary Analyze Drc Violation
FastScan and FlexTest Reference Manual, V8.6_4
2-135
E9 — The drivers of wire gates must not be capable of driving opposing
binary values.
The following lists the Trace rules violation IDs. For a complete description of
these violations refer to the “Scan Chain Trace Rules” section of the Design-for-
Test: Common Resources Manual:
T2 — The netlist contains the blocked gate. The pin data shows the values
the tool simulates for all time periods of the shift procedure.
T3 — The netlist contains all the gates in the backtrace cone of the blocked
gate. The pin data shows the values the tool simulates for all time periods of
the shift procedure.
T4 — The netlist contains all the gates in the backtrace cone of the clock
inputs of the blocked gate. The pin data shows the values the tool simulates
for all time periods of the shift procedure.
T5 | T6 — The netlist contains all the gates in the backtrace cone of the
clock inputs of the blocked gate. The pin data shows the values the tool
simulates for all time periods of the shift procedure.
T7 — The netlist contains all the gates in the path between the two failing
latches. The pin data shows the values the tool simulates for all time periods
of the shift procedure.
T11 — A clock input of the memory element closest to the scan chain input
must not be on during the shift procedure prior to the time of the force_sci
statement.
T16 — When clocks and write control lines are off and pin constraints are
set, the gate that connects to the input of a reconvergent pulse generator
sink (PGS) gate in the long path must be at the non-controlling value of the
PGS gate.
T17 — Reconvergent pulse generator sink gates cannot connect to any of
the following: primary outputs, non-clock inputs of the scan memory
elements, ROM gates, non-write inputs of RAMs and transparent latches.
Examples
The following example defines the off-state of a clock incorrectly, causing a C2
rule violation. When a rule violation occurs, you can use the schematic viewer to
analyze the probable cause of the error.