Command Dictionary Report Gates
FastScan and FlexTest Reference Manual, V8.6_4
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SW NMOS switch gate,
first input is active high enable line
for FastScan,
and second input is active high
enable line for FlexTest
PBUS SWBUS pulled bus gate,
where the second input is the pulled
value
OUT ROUT memory model gate,
created for each read data bit
RAM RAM random access memory
ROM ROM read only memory
XDET XDET X detector, gives 1 when input is X
ZDET ZDET Z detector, gives 1 when input is Z
TLA transparent latch
STLA seq_transparent latch
STFF seq_transparent flip-flip
Table 2-4. FlexTest Learned Gate Types
LEARN_BUF LEARN_XOR LEARN_TIED_Or
LEARN_INV LEARN_MUX FORBid
LEARN_AND LEARN_TIED_Xor ZHOLD
LEARN_OR LEARN_TIED_And
Table 2-3. Reportable Gate Types [continued]
gate_type
FastScan FlexTest Description