Toshiba TLCS-900 Computer Hardware User Manual


 
TMP92CM22
2007-02-16
92CM22-100
3.7.1 Block Diagrams
Figure 3.7.1 TMRA01 Block Diagram
φT1
φT16
φT256
8-bit comparator
(CP1)
8-bit comparator
(CP0)
8-bit up counter
(UC0)
2
n
overflow
8-bit up counter
(UC1)
Timer
flip-flop
TA1FF
Match
detect
Match
detect
8-bit timer register
TA1REG
φT1
φT4
φT16
512 256 128 64 32 16 8 4 2
φT1 φT4 φT16 φT256
Run/clea
r
Prescale
r
External input
clock: TA0IN
TA01MOD
<TA0CLK1:0>
Prescale
r
clock: φT0
TA01RUN<TA0RUN>
Selecto
r
8-bit timer register
TA0REG
TA01MOD
<PWM01:00>
TA01MOD
<TA01M1:0>
TMRA0
interrupt output:
INTTA0
TMRA0
match output:
TA0TRG
TA01MOD
<TA1CLK1:0>
TA01RUN<TA1RUN>
TA1FFCR
Timer flip-flop
output:
TA1OUT
TMRA1
interrupt output:
INTTA1
Internal data bus
TA01RUN
<TA0RDE>
TA01RUN
<TA01PRUN>
Selecto
r
Internal data bus
TA0TRG
Register buffer 0