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TMP92CM22
2007-02-16
92CM22-72
Port D Register
7 6 5 4 3 2 1 0
Bit symbol PD3 PD2 PD1 PD0
Read/Write R/W
After reset Data from external port
(Output latch register is set to 1)
Port D Control Register
7 6 5 4 3 2 1 0
Bit symbol PD3C PD2C PD1C PD0C
Read/Write W
After reset 0 0 0 0
Function 0: Input
1: Output
0: Input
1: Output
0: Input
1: Output
0: Input
1: Output
0 Input
1 Output
Port D Function Register
7 6 5 4 3 2 1 0
Bit symbol PD3F PD2F PD1F PD0F
Read/Write W
After reset 0 0 0 0
Function 0: Port
1: TB1OUT1
0: Port
1: TB1OUT0
0: Port
1: TB0IN1
INT5 Input
0: Port
1: TB0IN0
INT4 Input
PDFC<PD2F> 1
PDCR<PD2C> 1
PDFC<PD3F> 1
PDCR<PD3C> 1
Note 1: Read-modify-write instruction is prohibited for the registers PDFC and PDCR.
Note 2: Can not read the output latch data when PD0 and PD1 are output mode.
Figure 3.5.24 Register for Port D
PDFC
(0037H)
PD
(0034H)
Port D I/O setting
PDCR
(0036H)
PD2 output setting asTB1OUT0
PD3 output setting as TB1OUT1