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APPENDIX A <REFERENCE> EXTERNAL DEVICE INTERFACE TIMINGS
S1C33210 PRODUCT PART EPSON A-93
A.1 DRAM (70ns)
DRAM interface setup examples – 70ns
Operating
frequency
RAS precharge
cycle
RAS cycle CAS cycle
Refresh RAS pulse
width
Refresh RPC delay
20MHz21221
25MHz21221
33MHz22331
DRAM interface timing – 70ns
DRAM interface Unit: ns 33MHz 25MHz 20MHz
Parameter Symbol Min. Max. Cycle Time Cycle Time Cycle Time
<Common parameters>
Random read/random write cycle time tRC 130 – 7 210 5 200 5 250
#RAS precharge time tRP 50 – 2 60 2 80 2 100
#RAS pulse width tRAS 70 10000 5 150 3 120 3 150
#CAS pulse width tCAS 20 10000 2.5 75 1.5 60 1.5 75
Row address setup time tASR 0 – 0.5 15 0.5 20 0.5 25
Row address hold time tRAH 10 – 1.5 45 0.5 20 0.5 25
Column address setup time tASC 0 – 0.5 15 0.5 20 0.5 25
#RAS→#CAS delay time tRCD 20 – 2.0 60 1.0 40 1.0 50
#RAS→column address delay time tRAD 15 – 1.5 45 0.5 20 0.5 25
<Read-cycle parameters>
#RAS access time tRAC – 70 4.5 135 2.5 100 2.5 125
#CAS access time tCAC – 20 2.5 75 1.5 60 1.5 75
Address access time tAA – 35 3.0 90 2.0 80 2.0 100
#OE access time tOAC – 20 4.5 135 2.5 100 2.5 125
Output buffer turn-off time tOFF 0 20 2 60 2 80 2 100
<Write-cycle parameters>
Data input hold time tDH 15 – 2.5 75 1.5 60 1.5 75
<Fast-page mode>
Fast-page mode cycle time tPC 45 – 3.0 90 2.0 80 2.0 100
Fast-page mode #CAS precharge time tCP 10 – 0.5 15 0.5 20 0.5 25
Access time after #CAS precharge tACP – 40 3.0 90 2.0 80 2.0 100
<Refresh cycle>
#CAS setup time tCSR 10 – 1.0 30 1.0 40 1.0 50
#CAS hold time tCHR 10 – 2.5 75 1.5 60 1.5 75
#RAS precharge→#CAS hold time tPPC 10 – 1.0 30 1.0 40 1.0 50
#RAS pulse width (only in refresh cycle) tRAS 70 10000 3.0 90 2.0 80 2.0 100