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8 ELECTRICAL CHARACTERISTICS
A-82 EPSON S1C33210 PRODUCT PART
EDO DRAM random access cycle (basic cycle)
BCLK
A[23:0]
#RAS
#HCAS/
#LCAS
#RD
D[15:0]
#WE
D[15:0]
RAS1
Data transfer #1
Next data transfer
CAS1 PRE1(precharge) RAS1' CAS1'
tAD tAD tAD
tCASD2tCASD1
tRDS2
tACCE
tRACE
tRDH
tRASD2tRASD1
tRASW
tRDD3tRDD1
tRDW2
tWRD3tWRD1
tWRW2
tWDD1 tWDD2
tCASW
tCACE
∗1
∗1 tRDH is measured with respect to the first signal change (negation) of either the #RD or the #RASx signals.
EDO DRAM page access cycle
BCLK
A[23:0]
#RAS
#HCAS/
#LCAS
#RD
D[15:0]
#WE
D[15:0]
RAS1
Data transfer #1 Data transfer #2 Next data transfer
CAS1 CAS2 PRE1
(precharge)
RAS1'
t
AD
t
AD
t
AD
t
RDS
t
ACCE
t
RACE
t
RASD2
t
RASD1
t
RDD3
t
RDD1
t
WRD3
t
WRD1
t
WDD1
t
WDD2
t
WDD2
t
CACE
t
ACCE
t
RASW
t
RDW2
t
CASD2
t
CASD1
t
CASW
t
WRW2
t
RDH
t
RDS
t
RDH
∗1
∗1 tRDH is measured with respect to the first signal change from among the #RD (negation), #RASx (negation)
and #CAS (fall) signals.