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Architecture
96
Instruction Notation Conventions
In this appendix all variable subfields in an instruction format are written in lower-case letters (rs, rt,
immediate, etc.).
For some instructions, an alias is used for subfield names, for the sake of clarity. For example, rs in a
load/store instruction may be referred to as “base”. Such an alias refers to a subfield that can take a variable
value and is therefore also written in lower-case letters.
The figure at the end of this appendix (Figure A-2) gives the actual bit codes for all mnemonics. Bit
encoding is also indicated in the descriptions of the individual instructions.
In the explanations that follow, the operation of each instruction is expressed in meta-language. The special
symbols used in this instructional notation are shown in Table A-1.
Sign Extension and Zero Extension
With some instructions the bit length may be extended; for example, a 16-bit offset may be extended to 32
bits. This extension can take the form of either a sign extension or zero extension.
• Sign extension
The extended part is filled with the value of the most significant bit.
• Zero extension
The extended part is filled with zeros.
110
01
1
0
0
0
11
01
001
16 bit
32 bit
11001 10 00
1
101 00111111 11 11
1
111 111
(Example)
(Example)
11001 10 00
1
101 001
16 bit
32 bit
11001 10 00
1
101 00100000 00 00
0
000 000