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Architecture
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6.3.2 Address Error exception
• Causes
− Attempting to load, fetch or store a word not aligned on a word boundary.
− Attempting to load or store a halfword not aligned on a halfword boundary.
− Attempting to access kernel mode address space kseg while in user mode.
• Exception mask
The Address Error exception is not maskable.
• Applicable instructions
LB, LBU, LH, LHU, LW, LWL, LWR, SB, SH, SW, SWL, SWR.
• Processing
− The common exception vector (0x8000 0080) is used.
− ExcCode AdEL(4) or AdES(5) in the Cause register is set depending on whether the memory
access attempt was a load or store.
− When the Address Error exception is raised, the misaligned virtual address causing the
exception, or the kernel mode virtual address that was illegally referenced, is placed in the
BadVAddr register.
− The EPC register points to the address of the instruction causing the exception. If, however, the
affected instruction was in the branch delay slot (for execution during a branch), the immediately
preceding branch instruction address is retained in the EPC register and the Cause register BD
bit is set to 1.