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Architecture
8
2.2 Registers
2.2.1 CPU registers
The R3900 Processor Core has the following 32-bit registers.
• Thirty-two general-purpose registers
• A program counter (PC)
• HI/LO registers for storing the result of multiply and divide operations
The configuration of the registers is shown in Figure 2-2.
The r0 and r31 registers have special functions.
• Register r0 always contains the value 0. It can be a target register of an instruction whose
operation result is not needed. Or, it can be a source register of an instruction that requires a value
of 0.
• Register r31 is the link register for the Jump And Link instruction. The address of the instruction
after the delay slot is placed in r31.
The R3900 Processor Core has the following three special registers that are used or modified
implicitly by certain instructions.
PC : Program counter
HI : High word of the multiply/divide registers
LO : Low word of the multiply/divide registers
The multiply/divide registers (HI, LO) store the double-word (64-bit) result of integer multiply
operations. In the case of integer divide operations, the quotient is stored in LO and the remainder in
HI.
Figure 2-2. R3900 Processor Core registers
r2
r1
r0
31 0
LO
HI
PC
31 0
31 0
31 0
Multiply/Divide registers
Program counter
General-purpose registers
.
.
.
.
r31
r30
r29