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Architecture
151
LWL Load Word Left LWL
31 26 25 21 20 16 15 0
LWL
100010
base rt offset
6 5 5 16
Format :
LWL rt, offset(base)
Description :
Used together with LWR to load four consecutive bytes to a register when the bytes cross a word
boundary. LWL loads the left part of the register from the appropriate part of the high-order word;
LWR loads the right part of the register from the appropriate part of the low-order word.
This instruction generates a 32-bit effective address that can point to any byte, by sign-extending the
16-bit offset and adding it to the contents of general-purpose register base. Only bytes from the
word in memory containing the designated starting byte are read. Depending on the starting byte,
from one to four bytes are loaded.
The concept is illustrated below. This instruction (LWL) first loads the designated memory byte
into the high-order (left-most) byte of the register; it then continues loading bytes from memory into
the register, proceeding toward the low-order byte of the memory word and the low-order byte of the
register, until it reaches the low-order byte of the memory word. The least-significant (right-most)
byte of the register is not changed.
10 32
54 76
Memory
(big endian)
Address 4
Address 0
Register
$24
A B DC
Before
loading
$24
D21 3
After
loading
LWL $24,1($0)