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Architecture
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DERET Debug Exception Return DERET
31 26 25 24 6 5 0
COP0
010000
CO
1
0
000 0000 0000 0000 0000
DERET
011111
6 1 19 6
Format :
DERET
Description :
Executes a return from a self-debug interrupt or exception. This instruction requires a branch delay
slot like that of the branch or jump instructions, and executes with a delay of one instruction cycle.
The DERET instruction itself cannot be put in the delay slot.
The return address stored in the DEPC register is copied to the PC, and processing returns to the
original program.
Note: If a MTC0 instruction was used to set the return address in the DEPC register, a minimum of
two instructions must be executed before executing DERET.
Operation :
T:
T + 1:
temp ← DEPC
PC ← temp
Debug
30
← 0
Exceptions :
Coprocessor Unusable exception