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TMPR3901F
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4.5 Bus Arbitration
4.5.1 Bus request and bus grant
An external bus master can request that the TMPR3901F grant control of the bus. This is done by
asserting the BUSREQ* signal. In response, the TMPR3901F will release the bus and assert a
BUSGNT* signal.
If BUSREQ* is asserted, while the TMPR3901F is already engaged in a bus operation cycle, the
TMPR3901F will not relinquish the bus until that cycle is completed.
Figure 4-8 shows timing for a bus request and bus grant during which the TMPR3901F relinquishes
the bus and an external bus master acquires the bus.
Figure 4-8 Bus arbitration
SYSCLK
A[31:2]
BE[3:0]*
RD*
WR*
LAST*
BURST*
BSTSZ[1:0]
BUSREQ*
BUSGNT*
SNOOP
BSTART*
MPU cycle DMA cycle
MPU
cycle