Architecture
30
Table 3-7. Multiply/Divide Instructions
(a) MULT, MULTU, DIV, DIVU
Instruction Format and Description
Multiply MULT rs, rt
Multiply the contents of registers rs and rt as two's complement integers, and
store the doubleword (64-bit) result in multiply/divide registers HI and LO.
Multiply
Unsigned
MULTU rs, rt
Multiply the contents of registers rs and rt as unsigned integers, and store the
doubleword (64-bit) result in multiply/divide registers HI and LO.
Divide DIV rs, rt
Divide register rs by register rt as two's complement integers. Store the 32-bit
quotient in LO, and the 32-bit remainder in HI.
Divide
Unsigned
DIVU rs, rt
Divide register rs by register rt as unsigned integers. Store the 32-bit quotient
in LO, and the 32-bit remainder in HI.
(b) MFHI, MFLO
Instruction Format and Description
Move From HI MFHI rd
Store the contents of multiply/divide register HI in register rd.
Move From
LO
MFLO rd
Store the contents of multiply/divide register LO in register rd.
(c) MTHI, MTLO
Instruction Format and Description
Move To HI MTHI rs
Store the contents of register rs in multiply/divide register HI.
Move To LO MTLO rs
Store the contents of register rs in multiply/divide register LO.
rt
rd
rs
0
rs
funct
funct
funct
0
0
0
op
op
op