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Architecture
153
LWR Load Word Right LWR
31 26 25 21 20 16 15 0
LWR
100110
base rt offset
6 5 5 16
Format :
LWR rt, offset(base)
Description :
Used together with LWL to load four consecutive bytes to a register when the bytes cross a word
boundary. LWR loads the right part of the register from the appropriate part of the low-order word;
LWL loads the left part of the register from the appropriate part of the high-order word.
This instruction generates a 32-bit effective address that can point to any byte, by sign-extending the
16-bit offset and adding it to the contents of general-purpose register base. Only bytes from the
word in memory containing the designated starting byte are read. Depending on the starting byte,
from one to four bytes are loaded.
The concept is illustrated below. This instruction (LWR) first loads the designated memory byte
into the low-order (right-most) byte of the register; it then continues loading bytes from memory into
the register, proceeding toward the high-order byte of the memory word and the high-order byte of
the register, until it reaches the high-order byte of the memory word. The most-significant (left-
most) byte of the register is not changed.
Memory
(big endian)
Before
loading
LWR $24,4($0)
After
loading
Address 4 4 5 6 7
Address 0 0 1 2 3
Register
A B C D $24
A B C 4 $24