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6.3.10 System Call exception
• Cause
− Execution of an R3900 Processor Core SYSCALL instruction.
• Exception mask
The System Call exception is not maskable.
• Applicable instructions
SYSCALL
• Processing
− The common exception vector (0x8000 0080) is used.
− Sys(8) is set for ExcCode in the Cause register.
− The EPC register points to the address of the instruction causing the exception. If, however,
that instruction is in the branch delay slot (for execution during a branch), the immediately
preceding branch instruction address is retained in the EPC register and the Cause register BD
bit is set to 1.
6.3.11 Non-maskable interrupt
• Cause
− Occurs at the falling edge of the non-maskable interrupt signal.
• Exception mask
The Non-maskable exception is not maskable. It is raised regardless of the Status register IEc
bit setting.
• Processing
− The same special interrupt vector as for Reset (0xBFC0 0000), residing in an area that is not
cached, is used. It is therefore not necessary for hardware to initialize cache memory in order
to process this exception.
− Unlike the Reset exception, here the Status register NmI bit is set.
− As with other exceptions (except for the Reset exception), the NmI exception occurs at an
instruction boundary. If a Non-maskable interrupt occurs during a bus cycle, interrupt
processing waits until the bus cycle has ended.
− All register contents are retained except for the following.
° The EPC register points to the address of the instruction causing the exception. If, however,
that instruction is in the branch delay slot (for execution during a branch), the immediately
preceding branch instruction address is retained in the EPC register and the Cause register BD
bit is set to 1.
° The Status register NmI bit is set to 1.
° The Config register Halt bit and Doze hit are cleared to 0.
° The Cause register CE bit and ExcCode are undefined.