Toshiba TX39 Computer Hardware User Manual


 
Architecture
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Table 5-1. Address segment attributes
Segment Virtual address Physical address Cacheable Mode
kseg2
(reserved)
0xFF00 0000-0xFFFF FFFF 0xFF00 0000-0xFFFF FFFF Uncacheable kernel
kseg2 0xC000 0000-0xFEFF FFFF 0xC000 0000-0xFEFF FFFF Cacheable kernel
kseg1 0xA000 0000-0xBFFF FFFF 0x0000 0000-0x1FFF FFFF Uncacheable kernel
kseg0 0x8000 0000-0x9FFF FFFF 0x0000 0000-0x1FFF FFFF Cacheable kernel
kuseg
(reserved)
0x7F00 0000-0x7FFF FFFF 0xBF00 0000-0xBFFF FFFF Uncacheable kernel/user
kuseg 0x0000 0000-0x7EFF FFFF 0x4000 0000-0xBEFF FFFF Cacheable kernel/user
The upper 16 Mbytes of kuseg and kseg2 are reserved for on-chip resources (these areas are not cacheable.)
Of the reserved area in kseg2, the area from 0xFF20 0000 to 0xFF3F FFFF is a 2 Mbyte area reserved by
Toshiba (intended for debug monitor and testing, etc.)
6.
Figure 5-3. Internal MMU address mapping
Kernel Cached
(kseg2)
Kernel Uncached
(kseg1)
Kernel Cached
(kseg0)
Kernel/User Cached
(kuseg)
Kernel/User
Cached Tasks
Inaccessible
Kernel Boot and I/O
Cached/Uncached
Kernel Cached
Tasks
0xFFFF FFFF
0xC000 0000
0xA000 0000
0x8000 0000
0x0000 0000
1024MB
2048MB
512MB
512MB
Virtual address space
Physical address space
16MB User Reserved
16MB Kernel Reserved