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Architecture
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− When a bus error occurs with a load instruction, the destination register value will be undefined.
− In the following cases, a Bus Error exception may be raised even though the instruction causing
the bus error did not actually execute.
(1) When a bus error occurs during an instruction cache refill, but the instruction sequence is
changed due to a jump/branch instruction in the instruction stream, the instruction at the
address where the bus error occurred may not actually execute.
(2) When a bus error occurs in a data cache block refill, the data at the address where the bus
error occurred may not actually have been used.
• Servicing
The address in the EPC register is undefined. In some cases it is not possible to determine the
address where a bus error actually occurred. If this address is required, then external hardware
must be used to store addresses. Using such an external circuit will allow you to retain the
address where a bus error occurs.