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Chapter 6 Exception Processing
This chapter explains how exceptions are handled by the R3900 Processor Core, and describes the registers of
the system control coprocessor CP0 used during exception handling.
6.1 Overview
When the R3900 Processor Core detects an exception, it suspends normal instruction execution. The
processor goes from user mode to kernel mode so it can perform processing to handle the abnormal condition
or asynchronous event.
The exception processing system in the R3900 Processor Core is designed for efficient handling of exceptions
such as arithmetic overflows, I/O interrupts and system calls. When an exception is detected, all normal
instruction execution is suspended . That is, execution of the instruction that caused the exception , as well
as execution processing of instructions already in the pipeline is halted. Processing jumps directly to the
exception handler designated for the raised exception.
When an exception is raised, the address at which execution should resume is loaded into the EPC (Exception
Program Counter) register indicating where processing should resume after the exception has been handled.
This will be the address of the instruction that caused the exception; or, if the instruction was supposed to be
executed during a branch (delay slot instruction), the resume address will be that of the immediately preceding
branch instruction.